Biblio
] , “A cost analysis framework for multi-core systems with spares”, in Test Conference, 2008. ITC 2008. IEEE International, 2008.
, “Error-locality-aware linear coding to correct multi-bit upsets in SRAMs”, in Test Conference (ITC), 2010 IEEE International, 2010.
, “End-to-end error correction and online diagnosis for on-chip networks”, in Test Conference (ITC), 2011 IEEE International, 2011.
ITC11.pdf (502.59 KB)
ITC11.pdf (502.59 KB), “Modeling yield, cost, and quality of a spare-enhanced multicore chip”, Computers, IEEE Transactions on, vol. 60, pp. 1246–1259, 2011.
, “Robust Design of Large Area Flexible Electronics via Compressed Sensing”, in 57th Design Automation Conference (DAC), 2020. DAC_2020 (3).pdf (6.24 MB)
DAC_2020 (3).pdf (6.24 MB), “Compact Modeling of Carbon Nanotube Thin Film Transistors for Flexible Circuit Design”, in Design, Automation and Test in Europe (DATE), Best Paper Award Nominations , Dresden, Germany, 2018. DATE_CNTTFT2018.pdf (2.1 MB)
DATE_CNTTFT2018.pdf (2.1 MB), “Process Design Kit for Flexible Hybrid Electronics”, in in 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), (Invited Paper), 2018. aspdac_pdk_for_FHE2018.pdf (1.38 MB)
aspdac_pdk_for_FHE2018.pdf (1.38 MB), “Fully Printed Organic Pseudo-CMOS Circuits for Sensing Applications”, in 1st IEEE International Flexible Electronics Technology Conference (IFETC), Ottawa, Canada, 2018. 2018IEEE-IFETC-Final.pdf (1.08 MB)
2018IEEE-IFETC-Final.pdf (1.08 MB), “Compact Modeling of Thin Film Transistors for Flexible Hybrid IoT Design”, IEEE Design & Test, no. Special Issue: Circuits and Systems for VLSI Internet-of-Things (IoT) Devices, 2019. IEEED&T.pdf (2.79 MB)
IEEED&T.pdf (2.79 MB), “Ultra-thin Skin Electronics for High Quality and Continuous Skin-Sensor-Silicon Interfacing”, in 56th Design Automation Conference, 2019. DAC_ACM.pdf (3.68 MB)
DAC_ACM.pdf (3.68 MB), “Task Mapping-Assisted Laser Power Scaling for Optical Network-on-Chips”, in International Conference On Computer Aided Design (ICCAD), Westminster, CO, 2019. 03C_3_Wang_finalpaper_08_06_2019_17_29.pdf (2.15 MB)
03C_3_Wang_finalpaper_08_06_2019_17_29.pdf (2.15 MB), “Characterization and Applications of Spatial Variation Models for Silicon Microring-Based Optical Transceivers”, in 57th Design Automation Conference (DAC), 2020. 66_5_Wang_finalpaper_03_26_2020_23_54.pdf (3.61 MB)
66_5_Wang_finalpaper_03_26_2020_23_54.pdf (3.61 MB), “Energy Efficiency and Yield Optimization for Optical Interconnects via Transceiver Grouping”, Journal of Lightwave Technology, In Press. JLT3039489.pdf (5.8 MB)
JLT3039489.pdf (5.8 MB), Electronic design automation: synthesis, verification, and test. Morgan Kaufmann, 2009.
, “Energy-Efficient Channel Alignment of DWDM Silicon Photonic Transceivers”, in Design, Automation and Test in Europe (DATE), Dresden, Germany, 2018. DATE18_YW_camera_ready_v4.pdf (1.45 MB)
DATE18_YW_camera_ready_v4.pdf (1.45 MB), “An all-digital built-in self-test technique for transfer function characterization of RF PLLs”, in Design, Automation Test in Europe Conference Exhibition (DATE), 2011, 2011.
, “Bidirectional Tuning of Microring-Based Silicon Photonic Transceivers for Optimal Energy Efficiency”, in 24th Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo, Japan, 2019. ASP-DAC19-Yuyang-camera_ready.pdf (2.94 MB)
ASP-DAC19-Yuyang-camera_ready.pdf (2.94 MB), “Taming Emerging Devices’ Variation and Reliability Challenges with Architectural and System Solutions”, in 32nd IEEE International Conference on Microelectronic Test Structures (Invited Paper), Kita-Kyushu City, Japan, 2019. Invited-3-Cheng.pdf (522.21 KB)
Invited-3-Cheng.pdf (522.21 KB), “Simulation-based functional test generation for embedded processors”, Computers, IEEE Transactions on, vol. 55, pp. 1335–1343, 2006.
“On a software-based self-test methodology and its application”, in VLSI Test Symposium, 2005. Proceedings. 23rd IEEE, 2005, pp. 107–113.
, “Spatial Pattern Analysis of Process Variations in Silicon Microring Modulators”, in IEEE Optical Interconnect Conference, San Diego, CA, 2016. OIC2016_final.pdf (553.24 KB)
OIC2016_final.pdf (553.24 KB), “Using visual features for anti-spam filtering”, in Image Processing, 2005. ICIP 2005. IEEE International Conference on, 2005, vol. 3, p. III–509.
, “Large-Signal Model for Small-Size High-Speed Carrier-Injection Silicon Microring Modulator”, in OSA Integrated Photonics Research, Silicon, and Nano-Photonics Conference (IPR), Vancouver, Canada, 2016. IPR2016_Rui_v6.pdf (2.15 MB)
IPR2016_Rui_v6.pdf (2.15 MB), “Compact Modeling and Circuit-Level Simulation of Silicon Nanophotonic Interconnects”, in Design, Automation and Test in Europe (DATE), Lausanne, 2017. DATE17_Rui_camera_ready.pdf (2.36 MB)
DATE17_Rui_camera_ready.pdf (2.36 MB), “Compact Modeling and System Implications of Microring Modulators in Nanophotonic Interconnects”, in International Workshop on System-Level Interconnect Prediction (SLIP) , San Francisco, CA, 2015. SLIP2015.pdf (569.23 KB)
SLIP2015.pdf (569.23 KB)