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| SAT-solver (1) | SCEMIT (1) | screen potential test escape (1) |
| second-order effects (1) | second-order thermo-optical effects (1) | security (1) |
| Semiconductor device measurement (3) | Semiconductor device modeling (1) | semiconductor technology (1) |
| Sensitivity (1) | Sensors (1) | sequential backtracing scheme (1) |
| Si (3) | sigma-delta fractional-N RF PLLs (1) | Silicon (4) |
| silicon debugging (1) | Silicon photonics (1) | silicon substrate (1) |
| single-bit upset (1) | single-run fault simulation (1) | small delay defect (1) |
| SoC (1) | Sociology (1) | Software algorithms (1) |
| software metrics (1) | spare programmable core (1) | spare wires (1) |
| spare-enhanced multi-core chip subject (1) | spatial correlations (1) | spatial item correlations (1) |
| spatial pattern (1) | spatial patterns (1) | spatial variations (1) |
| spatiotemporal reuse (1) | spectral dependency (1) | SRAM (1) |
| SRAM chips (1) | SRAM memory (1) | standard cell (1) |
| static gain (1) | statistical analysis (1) | statistical regression method (1) |
| statistical regression tools (1) | statistical test (1) | statistical testing (1) |
| steady-state fluctuation (1) | storage management chips (1) | Stress (1) |
| stuck-at faults (1) | Substrates (2) | Switches (2) |
| syndrome analysis (1) | System analysis and design (1) | System recovery (1) |
| System testing (1) | system-on-chip (2) | SystemC (1) |
| SystemC error (1) | | |
