Biblio

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Author [ Year(Asc)]
Filters: Author is Wu, Cheng-Wen  [Clear All Filters]
2013
H. - M. Chang Chang, Huang, J. - L., Kwai, D. - M., Cheng, K. - T. Tim, and Wu, C. - W., Low-cost error tolerance scheme for 3-D CMOS imagers, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 21, pp. 465–474, 2013.
2010
H. - M. Sherman Chang, Huang, J. - L., Kwai, D. - M., Cheng, K. - T. Tim, and Wu, C. - W., An Error Tolerance Scheme for 3D CMOS Imagers, in Proceedings of the 47th Design Automation Conference, New York, NY, USA, 2010.