Biblio

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Filters: Keyword is Logic gates  [Clear All Filters]
2015
N. Lesperance, Kulkarni, S., and Cheng, K. - T. Tim, Hardware Trojan Detection Using Exhaustive Testing of k-bit Subspaces, in Asia and South Pacific Design Automation Conference (ASP-DAC), 2015.PDF icon ASPDAC2015.pdf (508.45 KB)
2014
D. Xiang, Sui, W., Yin, B., and Cheng, K. - T. Tim, Compact Test Generation With an Influence Input Measure for Launch-On-Capture Transition Fault Testing, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 22, pp. 1968-1979, 2014.
D. Xu, Li, H., Ghofrani, A., Cheng, K. - T. Tim, Han, Y., and Li, X., Test-Quality Optimization for Variable n -Detections of Transition Faults, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 22, pp. 1738-1749, 2014.