Biblio

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C
K. - T. Tim Cheng, Automatic Test Pattern Generation, in EDA for IC System Design, Verification, and Testing, CRC Press, 2006.
K. - T. Tim Cheng and Huang, T. - C. Jim, Design, analysis, and test of low-power and reliable flexible electronics, in VLSI Test Symposium (VTS), 2010 28th, 2010.
K. - T. Tim Cheng and Chang, H. - M. Sherman, Test strategies for adaptive equalizers, in Custom Integrated Circuits Conference, 2009. CICC'09. IEEE, 2009.
F
T. Feng, Wang, L. - C., Cheng, K. - T. Tim, and Lin, C. - C. Andy, Using 2-domain partitioned OBDD data structure in an enhanced symbolic simulator, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 10, pp. 627–650, 2005.
S. Feng, Shang, K., Bovington, J., Wu, R., Guan, B., Cheng, K. - T. Tim, Bowers, J. E., and Ben Yoo, S. J., Athermal silicon ring resonators clad with titanium dioxide for 1.3µm wavelength operation, Optics Express, 2015.PDF icon OE_athermal1.3.pdf (1.11 MB)
S. Feng, Shang, K., Bovington, J., Wu, R., Cheng, K. - T. Tim, Bowers, J. E., and Ben Yoo, S. J., Athermal characteristics of TiO2-clad silicon waveguides at 1.3 um, in Photonics Conference (IPC), IEEE, San Diego, CA, 2014.PDF icon IPC2014_submit.pdf (213.72 KB)
N. Fern, San, I., Koc, C. Kaya, and Cheng, K. - T. Tim, Hiding Hardware Trojan Communication Channels in Partially Specified SoC Bus Functionality, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. PP, 2016.PDF icon TCAD.pdf (2.23 MB)
N. Fern, San, I., and Cheng, K. - T. Tim, Detecting Hardware Trojans in Unspecified Functionality Through Solving Satisfiability Problems, in Asia and South Pacific Design Automation Conference (ASP-DAC), 2017.PDF icon ASPDAC17_v2.pdf (399.81 KB)
N. Fern and Cheng, K. - T. Tim, Verification and Trust for Unspecified IP Functionality, in Hardware IP Security and Trust, P. Mishra, Bhunia, S., and Tehranipoor, M., Eds. Springer, 2017.
N. Fern and Cheng, K. - T. Tim, Mining Mutation Testing Simulation Traces for Security and Testbench Debugging, in International Conference on Computer-Aided Design (ICCAD), 2017.PDF icon ICCAD17_v2.pdf (650.84 KB)
N. Fern, Kulkarni, S., and Cheng, K. - T. Tim, Hardware Trojans Hidden in RTL Don’t Cares – Automated Insertion and Prevention Methodologies, in International Test Conference (ITC), 2015.PDF icon ITC15.pdf (278.4 KB)
N. Fern and Cheng, K. - T. Tim, Detecting Hardware Trojans in Unspecified Functionality Using Mutation Testing, in International Conference on Computer Aided Design (ICCAD), 2015.PDF icon ICCAD15.pdf (382.74 KB)
N. Fern, San, I., Koc, C. Kaya, and Cheng, K. - T. Tim, Hardware Trojans in Incompletely Specified On-chip Bus Systems, in Design, Automation, Test in Europe (DATE), 2016.PDF icon DATE16_4page_aff.pdf (315.73 KB)
K. Fukuda, Huang, T. - C. Jim, Kuribara, K., Yokota, T., Sekitani, T., Zschieschang, U., Klauk, H., Ikeda, M., Kuwabara, H., Yamamoto, T., Takimiya, K., Cheng, K. - T. Tim, and Someya, T., Organic Pseudo-CMOS for 2V Operational High-Speed Circuits. 2011.
K. Fukuda, Sekitani, T., Yokota, T., Kuribara, K., Huang, T. - C. Jim, Sakurai, T., Zschieschang, U., Klauk, H., Ikeda, M., Kuwabara, H., Yamamoto, T., Takimiya, K., Cheng, K. - T. Tim, and Someya, T., Organic pseudo-CMOS circuits for low-voltage large-gain high-speed operation, Electron Device Letters, IEEE, vol. 32, pp. 1448–1450, 2011.
G
M. Gao, Chang, H. - M. Sherman, Lisherness, P., and Cheng, K. - T. Tim, Time-Multiplexed Online Checking: A Feasibility Study, in Asian Test Symposium, 2008. ATS'08. 17th, 2008.
M. Gao, Lisherness, P., and Cheng, K. - T. Tim, Adaptive test selection for post-silicon timing validation: A data mining approach, in Test Conference (ITC), 2012 IEEE International, 2012.
M. Gao and Cheng, K. - T. Tim, Low Overhead Time-Multiplexed Online Checking: A Case Study of An H.264 Decoder, in Asian Test Symposium, 2009. ATS '09., 2009.
L. Gao, Merrikh-Bayat, F., Alibart, F., Guo, X., Hoskins, B. D., Cheng, K. - T. Tim, and Strukov, D. B., Digital-to-analog and analog-to-digital conversion with metal oxide memristors for ultra-low power computing, in Nanoscale Architectures (NANOARCH), 2013 IEEE/ACM International Symposium on, 2013.
M. Gao and Cheng, K. - T. Tim, A case study of Time-Multiplexed Assertion Checking for post-silicon debugging, in High Level Design Validation and Test Workshop (HLDVT), 2010 IEEE International, 2010.
M. Gao, Lisherness, P., and Cheng, K. - T. Tim, Post-silicon Bug Detection for Variation Induced Electrical Bugs, in Proceedings of the 16th Asia and South Pacific Design Automation Conference, Piscataway, NJ, USA, 2011.
M. Gao, Chang, H. - M. Sherman, Lisherness, P., and Cheng, K. - T. Tim, Time-multiplexed online checking, Computers, IEEE Transactions on, vol. 60, pp. 1300–1312, 2011.
M. Gao, Lisherness, P., Cheng, K. - T. Tim, and Liou, J. - J., On error modeling of electrical bugs for post-silicon timing validation, in Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific, 2012.
A. Ghofrani, Parikh, R., Shamshiri, S., DeOrio, A., Cheng, K. - T. Tim, and Bertacco, V., Comprehensive online defect diagnosis in on-chip networks., in VLSI Test Symposium (VTS), 2012.PDF icon VTS12_cr.pdf (710.92 KB)
A. Ghofrani, Lastras-Montano, M. Angel, and Cheng, K. - T. Tim, Towards data reliable crossbar-based memristive memories, in Test Conference (ITC), 2013 IEEE International, 2013.PDF icon ITC'13_CR.pdf (2.68 MB)

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