Biblio

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H. Li, Xu, D., Han, Y., Cheng, K. - T. Tim, and Li, X., nGFSIM : A GPU-based fault simulator for 1-to-n detection and its applications, in Test Conference (ITC), 2010 IEEE International, 2010.
N. Lesperance, Kulkarni, S., and Cheng, K. - T. Tim, Hardware Trojan Detection Using Exhaustive Testing of k-bit Subspaces, in Asia and South Pacific Design Automation Conference (ASP-DAC), 2015.PDF icon ASPDAC2015.pdf (508.45 KB)
T. Lei, Shao, L., Zheng, Y., Pitner, G., Fang, G., Zhu, C., Li, S., Beausoleil, R. G., Wong, H. - S. Philip, Huang, T. - C. Jim, Cheng, K. - T. Tim, and Bao, Z., Low-voltage High-performance Flexible Digital and Analog Circuits based on Ultrahigh-purity Semiconducting Carbon Nanotubes, Nature Communication, 2019.PDF icon s41467-019-10145-9.pdf (3.65 MB)
M. Angel Lastras-Montano, Ghofrani, A., and Cheng, K. - T. Tim, Architecting Energy Efficient Crossbar-based Memristive Random Access Memories, in ACM/IEEE Internation Symposium on Nano-scale Architectures (NANOARCH'15), 2015.PDF icon NANOARCH15.pdf (3.42 MB)
M. Angel Lastras-Montano, Ghofrani, A., and Cheng, K. - T. Tim, Architecting Low Power Crossbar-Based Memristive RAM, in Non-Volatile Memory Workshop, San Diego, USA, 2013.PDF icon NVMW13.pdf (721.83 KB)
M. Angel Lastras-Montano, Ghofrani, A., and Cheng, K. - T. Tim, A Low-Power Hybrid Reconfigurable Architecture For Resistive Random-Access Memories, in International Symposium on High-Performance Computer Architecture (HPCA), Barcelona, Spain, 2016.PDF icon HPCA16_1.pdf (6.47 MB)
M. Angel Lastras-Montano, Chakrabarti, B., Strukov, D. B., and Cheng, K. - T. Tim, 3D-DPE: A 3D High-Bandwidth Dot-Product Engine for High-Performance Neuromorphic Computing, Design, Automation and Test in Europe (DATE). Lausanne, Switzerland, 2017.
M. Angel Lastras-Montano, Ghofrani, A., and Cheng, K. - T. Tim, HReRAM: A Hybrid Reconfigurable Resistive Random-Access Memory, Proceedings Design, Automation, and Test in Europe (DATE), IEEE, 2015.PDF icon DATE15_1.pdf (5.59 MB)
F. Lan, Wu, R., Zhang, C., Pan, Y., and Cheng, K. - T. Tim, DLPS: Dynamic Laser Power Scaling for Optical Network-on-Chip, in Asia and South Pacific Design Automation Conference (ASP-DAC), Chiba/Tokyo, Japan, 2017.PDF icon laser_final.pdf (2.21 MB)

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