Biblio

Export 159 results:
Author [ Year(Asc)]
2013
M. Angel Lastras-Montano, Ghofrani, A., and Cheng, K. - T. Tim, Architecting Low Power Crossbar-Based Memristive RAM, in Non-Volatile Memory Workshop, San Diego, USA, 2013. NVMW13.pdf (721.83 KB)
L. Gao, Merrikh-Bayat, F., Alibart, F., Guo, X., Hoskins, B. D., Cheng, K. - T. Tim, and Strukov, D. B., Digital-to-analog and analog-to-digital conversion with metal oxide memristors for ultra-low power computing, in Nanoscale Architectures (NANOARCH), 2013 IEEE/ACM International Symposium on, 2013.
H. - M. Chang Chang, Huang, J. - L., Kwai, D. - M., Cheng, K. - T. Tim, and Wu, C. - W., Low-cost error tolerance scheme for 3-D CMOS imagers, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 21, pp. 465–474, 2013.
P. Lisherness, Lesperance, N., and Cheng, K. - T. Tim, Mutation analysis with coverage discounting, in Design, Automation Test in Europe Conference (DATE), 2013. DATE13.pdf (167.64 KB)
J. Bovington, Wu, R., Cheng, K. - T. Tim, and Bowers, J. E., Role of thermal stress in athermal waveguide design using TiO2 waveguides on a silicon substrate, in Photonics Conference (IPC), IEEE, Seattle, WA, 2013. IPC_2013_final.pdf (215.82 KB)
C. - K. Hsu, Lin, F., Cheng, K. - T. Tim, Zhang, W., Li, X., Carulli, J. M., and Butler, K. M., Test data analytics - Exploring spatial and test-item correlations in production test data, in Test Conference (ITC), 2013 IEEE International, 2013.
A. Ghofrani, Lastras-Montano, M. Angel, and Cheng, K. - T. Tim, Towards data reliable crossbar-based memristive memories, in Test Conference (ITC), 2013 IEEE International, 2013. ITC'13_CR.pdf (2.68 MB)
2012
K. - T. Tim Cheng and Strukov, D. B., 3D CMOS-memristor hybrid circuits: devices, integration, architecture, and applications, in Proceedings of the 2012 ACM International Symposium on Physical Design, 2012.
M. Gao, Lisherness, P., and Cheng, K. - T. Tim, Adaptive test selection for post-silicon timing validation: A data mining approach, in Test Conference (ITC), 2012 IEEE International, 2012.
A. Ghofrani, Parikh, R., Shamshiri, S., DeOrio, A., Cheng, K. - T. Tim, and Bertacco, V., Comprehensive online defect diagnosis in on-chip networks., in VLSI Test Symposium (VTS), 2012. VTS12_cr.pdf (710.92 KB)
M. Gao, Lisherness, P., Cheng, K. - T. Tim, and Liou, J. - J., On error modeling of electrical bugs for post-silicon timing validation, in Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific, 2012.
P. Lisherness and Cheng, K. - T. Tim, Improving validation coverage metrics to account for limited observability, in Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific, 2012.
Y. Zheng, Lisherness, P., Shamshiri, S., Ghofrani, A., Yang, S., and Cheng, K. - T. Tim, Post-fabrication reconfiguration for power-optimized tuning of optically connected multi-core systems, in Design Automation Conference (ASP-DAC), Asia and South Pacific, 2012. ASPDAC2012_optical.pdf (221.18 KB)
Y. Zheng, Lisherness, P., Gao, M., Bovington, J., Yang, S., and Cheng, K. - T. Tim, Power-efficient calibration and reconfiguration for on-chip optical communication, in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012. DATE2012_optical.pdf (341.67 KB)
Y. Zheng, Lisherness, P., Gao, M., Bovington, J., Cheng, K. - T., Wang, H., and Yang, S., Power-efficient calibration and reconfiguration for optical network-on-chip, Journal of Optical Communications and Networking, vol. 4, pp. 955–966, 2012. JOCN2012.pdf (1.49 MB)
2011
P. - Y. Wang, Chang, H. - M. Sherman, and Cheng, K. - T. Tim, An all-digital built-in self-test technique for transfer function characterization of RF PLLs, in Design, Automation Test in Europe Conference Exhibition (DATE), 2011, 2011.
P. Lisherness and Cheng, K. - T. Tim, Coverage discounting: A generalized approach for testbench qualification, in High Level Design Validation and Test Workshop (HLDVT), 2011 IEEE International, 2011.
S. Shamshiri, Ghofrani, A., and Cheng, K. - T. Tim, End-to-end error correction and online diagnosis for on-chip networks, in Test Conference (ITC), 2011 IEEE International, 2011. ITC11.pdf (502.59 KB)
H. - M. Sherman Chang and Cheng, K. - T. Tim, Image quality aware metrics for performance specification of ADC array in 3D CMOS imagers, in Proceedings of the 48th Design Automation Conference, 2011.
S. Shamshiri and Cheng, K. - T. Tim, Modeling yield, cost, and quality of a spare-enhanced multicore chip, Computers, IEEE Transactions on, vol. 60, pp. 1246–1259, 2011.
K. Fukuda, Sekitani, T., Yokota, T., Kuribara, K., Huang, T. - C., Sakurai, T., Zschieschang, U., Klauk, H., Ikeda, M., Kuwabara, H., Yamamoto, T., Takimiya, K., Cheng, K. - T. Tim, and Someya, T., Organic pseudo-CMOS circuits for low-voltage large-gain high-speed operation, Electron Device Letters, IEEE, vol. 32, pp. 1448–1450, 2011.
K. Fukuda, Huang, T. - C., Kuribara, K., Yokota, T., Sekitani, T., Zschieschang, U., Klauk, H., Ikeda, M., Kuwabara, H., Yamamoto, T., Takimiya, K., Cheng, K. - T. Tim, and Someya, T., Organic Pseudo-CMOS for 2V Operational High-Speed Circuits. 2011.

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