Biblio
] , “A Configurable CMOS Memory Platform for 3D Integrated Memristors”, in International Symposium on Circuits and Systems , Lisbon, Portugal, 2015.
ISCAS15.pdf (714.06 KB)
ISCAS15.pdf (714.06 KB), “Structural search for RTL with predicate learning”, in Proceedings of the 42nd annual Design Automation Conference, 2005, pp. 451–456.
, “RTL SAT simplification by boolean and interval arithmetic reasoning”, in Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design, 2005, pp. 297–302.
, “Generation of shorter sequences for high resolution error diagnosis using sequential sat”, in Proceedings of the 2006 Asia and South Pacific Design Automation Conference, 2006, pp. 25–29.
, “A framework for system reliability analysis considering both system error tolerance and component test quality”, in Proceedings of the conference on Design, automation and test in Europe, 2007.
, “A clock-less jitter spectral analysis technique”, Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 55, pp. 2263–2272, 2008.
, “RTL error diagnosis using a word-level SAT-solver”, in Test Conference, 2008. ITC 2008. IEEE International, 2008.
, “Sequential equivalence checking based on K-th invariants and circuit SAT solving”, in High-Level Design Validation and Test Workshop, 2005. Tenth IEEE International, 2005, pp. 45–51.
, “SEChecker: A Sequential Equivalence Checking Framework Based on th Invariants”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 17, pp. 733–746, 2009.
, “IChecker: An efficient checker for inductive invariants”, in High-Level Design Validation and Test Workshop, 2006. Eleventh Annual IEEE International, 2006.
, “An efficient sequential SAT solver with improved search strategies”, in Proceedings of the conference on Design, Automation and Test in Europe-Volume 2, 2005, pp. 1102–1107.
, “A Portable Multi-pitch e-Drum Based on Printed Flexible Pressure Sensors”, in Proceedings of the Conference on Design, Automation and Test in Europe, 3001 Leuven, Belgium, Belgium, 2010.
, “An instrumented observability coverage method for system validation”, in High Level Design Validation and Test Workshop, 2009. HLDVT 2009. IEEE International, 2009.
, “Mutation analysis with coverage discounting”, in Design, Automation Test in Europe Conference (DATE), 2013. DATE13.pdf (167.64 KB)
DATE13.pdf (167.64 KB), “SCEMIT: A SystemC error and mutation injection tool”, in Design Automation Conference (DAC), 2010 47th ACM/IEEE, 2010.
, “Coverage discounting: A generalized approach for testbench qualification”, in High Level Design Validation and Test Workshop (HLDVT), 2011 IEEE International, 2011.
, “Improving validation coverage metrics to account for limited observability”, in Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific, 2012.
, “Feature engineering with canonical analysis for effective statistical tests screening test escapes”, in Test Conference (ITC), 2014 IEEE International, 2014. itc14.pdf (4.28 MB)
itc14.pdf (4.28 MB), “Multiple-fault diagnosis based on single-fault activation and single-output observation”, in Design, Automation and Test in Europe, 2006. DATE'06. Proceedings, 2006, vol. 1, pp. 1–6.
, “An Artificial Neural Network Approach for Screening Test Escapes”, Asia and South Pacific Design Automation Conference (ASP-DAC). Chiba/Tokyo, Japan, 2017. aspdac17.pdf (810.67 KB)
aspdac17.pdf (810.67 KB), “Learning from Production Test Data: Correlation Exploration and Feature Engineering”, in Test Symposium (ATS), 2014 IEEE 23rd Asian, 2014. ats14.pdf (2.45 MB)
ats14.pdf (2.45 MB), “Pseudofunctional testing”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 25, pp. 1535–1546, 2006.
, “A unified approach to test generation and test data volume reduction”, in Test Conference, 2006. ITC'06. IEEE International, 2006.
, “Testable design for adaptive linear equalizer in high-speed serial links”, in Test Conference, 2006. ITC'06. IEEE International, 2006.
, “Constraint extraction for pseudo-functional scan-based delay testing”, in Proceedings of the 2005 Asia and South Pacific Design Automation Conference, 2005, pp. 166–171.