Biblio

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C. - K. Ong, Hong, D., Cheng, K. - T. Tim, and Wang, L. - C., A clock-less jitter spectral analysis technique, Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 55, pp. 2263–2272, 2008.
M
S. Mirzaeian, Zheng, F., and Cheng, K. - T. Tim, RTL error diagnosis using a word-level SAT-solver, in Test Conference, 2008. ITC 2008. IEEE International, 2008.
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F. Lu and Cheng, K. - T. Tim, Sequential equivalence checking based on K-th invariants and circuit SAT solving, in High-Level Design Validation and Test Workshop, 2005. Tenth IEEE International, 2005, pp. 45–51.
F. Lu and Cheng, K. - T. Tim, IChecker: An efficient checker for inductive invariants, in High-Level Design Validation and Test Workshop, 2006. Eleventh Annual IEEE International, 2006.
F. Lu and Cheng, K. - T. Tim, SEChecker: A Sequential Equivalence Checking Framework Based on th Invariants, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 17, pp. 733–746, 2009.
F. Lu, Iyer, M. K., Parthasarathy, G., Wang, L. - C., Cheng, K. - T. Tim, and Chen, K. - C., An efficient sequential SAT solver with improved search strategies, in Proceedings of the conference on Design, Automation and Test in Europe-Volume 2, 2005, pp. 1102–1107.
C. - M. Lo, Huang, T. - C. Jim, Chiang, C. - Y., Hou, J., and Cheng, K. - T. Tim, A Portable Multi-pitch e-Drum Based on Printed Flexible Pressure Sensors, in Proceedings of the Conference on Design, Automation and Test in Europe, 3001 Leuven, Belgium, Belgium, 2010.
P. Lisherness, Lesperance, N., and Cheng, K. - T. Tim, Mutation analysis with coverage discounting, in Design, Automation Test in Europe Conference (DATE), 2013.PDF icon DATE13.pdf (167.64 KB)
P. Lisherness and Cheng, K. - T. Tim, SCEMIT: A SystemC error and mutation injection tool, in Design Automation Conference (DAC), 2010 47th ACM/IEEE, 2010.
P. Lisherness and Cheng, K. - T. Tim, An instrumented observability coverage method for system validation, in High Level Design Validation and Test Workshop, 2009. HLDVT 2009. IEEE International, 2009.
P. Lisherness and Cheng, K. - T. Tim, Coverage discounting: A generalized approach for testbench qualification, in High Level Design Validation and Test Workshop (HLDVT), 2011 IEEE International, 2011.
P. Lisherness and Cheng, K. - T. Tim, Improving validation coverage metrics to account for limited observability, in Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific, 2012.
F. Lin, Hsu, C. - K., and Cheng, K. - T. Tim, Feature engineering with canonical analysis for effective statistical tests screening test escapes, in Test Conference (ITC), 2014 IEEE International, 2014.PDF icon itc14.pdf (4.28 MB)
F. Lin, Hsu, C. - K., and Cheng, K. - T. Tim, AdaTest: An Efficient Statistical Test Framework for Test Escape Screening, in International Test Conference (ITC), Anaheim, CA, 2015.PDF icon itc15.pdf (273 KB)
Y. - C. Lin and Cheng, K. - T. Tim, Multiple-fault diagnosis based on single-fault activation and single-output observation, in Design, Automation and Test in Europe, 2006. DATE'06. Proceedings, 2006, vol. 1, pp. 1–6.
F. Lin, Hsu, C. - K., Busetto, A. Giovanni, and Cheng, K. - T. Tim, Pairwise Proximity-Based Features for Test Escape Screening, in International Conference on Computer-Aided Design (ICCAD), Austin, TX, 2015.PDF icon iccad15.pdf (792.61 KB)
F. Lin, Hsu, C. - K., and Cheng, K. - T. Tim, Learning from Production Test Data: Correlation Exploration and Feature Engineering, in Test Symposium (ATS), 2014 IEEE 23rd Asian, 2014.PDF icon ats14.pdf (2.45 MB)
Y. - C. Lin, Lu, F., and Cheng, K. - T. Tim, Pseudofunctional testing, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 25, pp. 1535–1546, 2006.
Y. - C. Lin and Cheng, K. - T. Tim, A unified approach to test generation and test data volume reduction, in Test Conference, 2006. ITC'06. IEEE International, 2006.
M. Lin and Cheng, K. - T. Tim, Testable design for adaptive linear equalizer in high-speed serial links, in Test Conference, 2006. ITC'06. IEEE International, 2006.

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