Biblio

Export 151 results:
Author [ Year(Asc)]
2010
M. Gao and Cheng, K. - T. Tim, A case study of Time-Multiplexed Assertion Checking for post-silicon debugging, in High Level Design Validation and Test Workshop (HLDVT), 2010 IEEE International, 2010.
K. - T. Tim Cheng and Huang, T. - C., Design, analysis, and test of low-power and reliable flexible electronics, in VLSI Test Symposium (VTS), 2010 28th, 2010.
H. - M. Sherman Chang, Huang, J. - L., Kwai, D. - M., Cheng, K. - T. Tim, and Wu, C. - W., An Error Tolerance Scheme for 3D CMOS Imagers, in Proceedings of the 47th Design Automation Conference, New York, NY, USA, 2010.
S. Shamshiri and Cheng, K. - T. Tim, Error-locality-aware linear coding to correct multi-bit upsets in SRAMs, in Test Conference (ITC), 2010 IEEE International, 2010.
H. - M. Sherman Chang and Cheng, K. - T. Tim, Low-cost quality assurance techniques for high-performance mixed-signal/RF circuits and systems, in Test Conference (ITC), 2010 IEEE International, 2010.
S. Shamshiri and Cheng, K. - T. Tim, Modeling yield, cost, and quality of an NoC with uniformly and non-uniformly distributed redundancy, in VLSI Test Symposium (VTS), 2010 28th, 2010.
H. Li, Xu, D., Han, Y., Cheng, K. - T. Tim, and Li, X., nGFSIM : A GPU-based fault simulator for 1-to-n detection and its applications, in Test Conference (ITC), 2010 IEEE International, 2010.
C. - M. Lo, Huang, T. - C., Chiang, C. - Y., Hou, J., and Cheng, K. - T. Tim, A Portable Multi-pitch e-Drum Based on Printed Flexible Pressure Sensors, in Proceedings of the Conference on Design, Automation and Test in Europe, 3001 Leuven, Belgium, Belgium, 2010.
T. - C. Huang, Fukuda, K., Lo, C. - M., Yeh, Y. - H., Sekitani, T., Someya, T., and Cheng, K. - T. Tim, Pseudo-CMOS: A novel design style for flexible electronics, in Design, Automation Test in Europe Conference Exhibition (DATE), 2010, 2010.
K. - T. Tim Cheng and Chang, H. - M. Sherman, Recent Advances in Analog, Mixed-Signal, and RF Testing, Information and Media Technologies, vol. 5, pp. 338-365, 2010.
P. Lisherness and Cheng, K. - T. Tim, SCEMIT: A SystemC error and mutation injection tool, in Design Automation Conference (DAC), 2010 47th ACM/IEEE, 2010.
D. Hong and Cheng, K. - T. Tim, A two-tone test method for continuous-time adaptive equalizers, in Efficient Test Methodologies for High-Speed Serial Links, Springer, 2010, pp. 75–87.
2009
H. - M. Sherman Chang, Lin, K. - Y., Chen, C. - H., and Cheng, K. - T. Tim, A built-in self-calibration scheme for pipelined ADCs, in Quality of Electronic Design, 2009. ISQED 2009. Quality Electronic Design, 2009.
H. - M. Sherman Chang, Chen, C. - H., Lin, K. - Y., and Cheng, K. - T. Tim, Calibration and testing time reduction techniques for a digitally-calibrated pipelined ADC, in VLSI Test Symposium, 2009. VTS'09. 27th IEEE, 2009.
H. - M. Sherman Chang, Lin, K. - Y., and Cheng, K. - T. Tim, Calibration as a Functional Test: An ADC Case Study, in 2009 Asian Test Symposium, 2009.
T. - C. Huang and Cheng, K. - T. Tim, Design for low power and reliable flexible electronics: Self-tunable cell-library design, Display Technology, Journal of, vol. 5, pp. 206–215, 2009.
D. Xiang, Yin, B., and Cheng, K. - T. Tim, Dynamic test compaction for transition faults in broadside scan testing based on an influence cone measure, in VLSI Test Symposium, 2009. VTS'09. 27th IEEE, 2009.
D. Hong and Cheng, K. - T. Tim, Efficient test methodologies for high-speed serial links, vol. 51. Springer Science & Business Media, 2009.
L. - T. Wang, Chang, Y. - W., and Cheng, K. - T. Tim, Electronic design automation: synthesis, verification, and test. Morgan Kaufmann, 2009.
P. Lisherness and Cheng, K. - T. Tim, An instrumented observability coverage method for system validation, in High Level Design Validation and Test Workshop, 2009. HLDVT 2009. IEEE International, 2009.
M. Gao and Cheng, K. - T. Tim, Low Overhead Time-Multiplexed Online Checking: A Case Study of An H.264 Decoder, in Asian Test Symposium, 2009. ATS '09., 2009.
F. Lu and Cheng, K. - T. Tim, SEChecker: A Sequential Equivalence Checking Framework Based on th Invariants, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 17, pp. 733–746, 2009.
M. Abbas, Cheng, K. - T. Tim, Furukawa, Y., Komatsu, S., and Asada, K., Signature-based testing for digitally-assisted adaptive equalizers in high-speed serial links, in Test Symposium, 2009 14th IEEE European, 2009.
H. - M. Sherman Chang and Cheng, K. - T. Tim, TAC: Testing time reduction for digitally-calibrated designs, in Mixed-Signals, Sensors, and Systems Test Workshop, 2009. IMS3TW'09. IEEE 15th International, 2009.
K. - T. Tim Cheng and Chang, H. - M. Sherman, Test strategies for adaptive equalizers, in Custom Integrated Circuits Conference, 2009. CICC'09. IEEE, 2009.

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