Biblio
] , “Robust circuit design for flexible electronics”, IEEE Design and Test of Computers, vol. 28, pp. 8–15, 2011.
, “Pseudo-CMOS: A novel design style for flexible electronics”, in Design, Automation Test in Europe Conference Exhibition (DATE), 2010, 2010.
, “Pseudo-CMOS: A Design Style for Low-Cost and Robust Flexible Electronics”, Electron Devices, IEEE Transactions on, vol. 58, pp. 141-150, 2011.
, “Design for Printability for Flexible Electronics: Self-Tunable Cell-Library Design”, in International Symposium for Flexible Electronics and Displays (ISFED), Hsinchu, Taiwan, 2007.
, “Reliability analysis for flexible electronics: Case study of integrated a-Si: H TFT scan driver”, ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 4, no. 3, 2008.
, “Design, Automation, and Test for Low-Power and Reliable Flexible Electronics”, Foundations and Trends in Electronic Design Automation, vol. 9, pp. 99-210, 2015.
, “Design for low power and reliable flexible electronics: Self-tunable cell-library design”, Display Technology, Journal of, vol. 5, pp. 206–215, 2009.
, “DWDM Nanophotonic Interconnects: Toward Terabit/s Chip-Scale Serial Link”, in International Midwest Symposium on Circuits and Systems (MWSCAS), Fort Collins, Colorado, 2015.
DWDM_nanophotnic link_JimHuang_camera_ready.pdf (1.23 MB)
DWDM_nanophotnic link_JimHuang_camera_ready.pdf (1.23 MB), “Robust Design and Design Automation for Flexible Hybrid Electronics”, in International Symposium on Circuits and Systems (ISCAS), 2017.
, “Process Design Kit and Design Automation for Flexible Hybrid Electronics”, in Design Automation And Test in Europe (Invited Paper), Florence, Italy, 2019. DATE19_Jim_submission.pdf (2.4 MB)
DATE19_Jim_submission.pdf (2.4 MB), “Process Design Kit and Design Automation for Flexible Hybrid Electronics”, in SID International Symposium, 2019. (invited paper), 2019. FHEPDK_Jim_Huang_SID19_for_review_v1.pdf (665.97 KB)
FHEPDK_Jim_Huang_SID19_for_review_v1.pdf (665.97 KB), “Test data analytics - Exploring spatial and test-item correlations in production test data”, in Test Conference (ITC), 2013 IEEE International, 2013.
, “Variation and Failure Characterization Through Pattern Classification of Test Data From Multiple Test Stages”, in IEEE International Test Conference (ITC), 2016. itc16.pdf (407.86 KB)
itc16.pdf (407.86 KB), Efficient test methodologies for high-speed serial links, vol. 51. Springer Science & Business Media, 2009.
, “Bit error rate estimation for improving jitter testing of high-speed serial links”, in Test Conference, 2006. ITC'06. IEEE International, 2006.
, “Bit-error-rate estimation for high-speed serial links”, Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 53, pp. 2616–2627, 2006.
, “A two-tone test method for continuous-time adaptive equalizers”, in Efficient Test Methodologies for High-Speed Serial Links, Springer, 2010, pp. 75–87.
, “An accurate jitter estimation technique for efficient high speed I/O testing”, in Asian Test Symposium, 2007. ATS'07. 16th, 2007.
, “Bit-error rate estimation for bang-bang clock and data recovery circuit in high-speed serial links”, in VLSI Test Symposium, 2008. VTS 2008. 26th IEEE, 2008.
, “Accurate Bit-Error-Rate estimation for efficient high speed I/O testing”, in Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on, 2008.