Low-cost error tolerance scheme for 3-D CMOS imagers

Submitted by superuser on Mon, 04/06/2015 - 19:04
H. - M. Chang Chang, Huang, J. - L., Kwai, D. - M., Cheng, K. - T. Tim, and Wu, C. - W., “Low-cost error tolerance scheme for 3-D CMOS imagers”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 21, pp. 465–474, 2013.