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An Error Tolerance Scheme for 3D CMOS Imagers
Submitted by
superuser
on Mon, 04/06/2015 - 20:42
H. - M. Sherman Chang
,
Huang, J. - L.
,
Kwai, D. - M.
,
Cheng, K. - T. Tim
, and
Wu, C. - W.
,
“
An Error Tolerance Scheme for 3D CMOS Imagers
”
, in
Proceedings of the 47th Design Automation Conference
, New York, NY, USA, 2010.
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