K.-T. Tim Cheng
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] , “A Portable Multi-pitch e-Drum Based on Printed Flexible Pressure Sensors”, in Proceedings of the Conference on Design, Automation and Test in Europe, 3001 Leuven, Belgium, Belgium, 2010.
, “Pseudo-CMOS: A novel design style for flexible electronics”, in Design, Automation Test in Europe Conference Exhibition (DATE), 2010, 2010.
, “Recent Advances in Analog, Mixed-Signal, and RF Testing”, Information and Media Technologies, vol. 5, pp. 338-365, 2010.
, “SCEMIT: A SystemC error and mutation injection tool”, in Design Automation Conference (DAC), 2010 47th ACM/IEEE, 2010.
, “A two-tone test method for continuous-time adaptive equalizers”, in Efficient Test Methodologies for High-Speed Serial Links, Springer, 2010, pp. 75–87.
, “A built-in self-calibration scheme for pipelined ADCs”, in Quality of Electronic Design, 2009. ISQED 2009. Quality Electronic Design, 2009.
, “Calibration and testing time reduction techniques for a digitally-calibrated pipelined ADC”, in VLSI Test Symposium, 2009. VTS'09. 27th IEEE, 2009.
, “Calibration as a Functional Test: An ADC Case Study”, in 2009 Asian Test Symposium, 2009.
, “Design for low power and reliable flexible electronics: Self-tunable cell-library design”, Display Technology, Journal of, vol. 5, pp. 206–215, 2009.
, “Dynamic test compaction for transition faults in broadside scan testing based on an influence cone measure”, in VLSI Test Symposium, 2009. VTS'09. 27th IEEE, 2009.
, Efficient test methodologies for high-speed serial links, vol. 51. Springer Science & Business Media, 2009.
, Electronic design automation: synthesis, verification, and test. Morgan Kaufmann, 2009.
, “An instrumented observability coverage method for system validation”, in High Level Design Validation and Test Workshop, 2009. HLDVT 2009. IEEE International, 2009.
, “Low Overhead Time-Multiplexed Online Checking: A Case Study of An H.264 Decoder”, in Asian Test Symposium, 2009. ATS '09., 2009.
, “SEChecker: A Sequential Equivalence Checking Framework Based on th Invariants”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 17, pp. 733–746, 2009.
, “Signature-based testing for digitally-assisted adaptive equalizers in high-speed serial links”, in Test Symposium, 2009 14th IEEE European, 2009.
, “TAC: Testing time reduction for digitally-calibrated designs”, in Mixed-Signals, Sensors, and Systems Test Workshop, 2009. IMS3TW'09. IEEE 15th International, 2009.
, “Test strategies for adaptive equalizers”, in Custom Integrated Circuits Conference, 2009. CICC'09. IEEE, 2009.
, “Yield and cost analysis of a reliable NoC”, in VLSI Test Symposium, 2009. VTS'09. 27th IEEE, 2009.
, “Accurate Bit-Error-Rate estimation for efficient high speed I/O testing”, in Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on, 2008.
, “Bit-error rate estimation for bang-bang clock and data recovery circuit in high-speed serial links”, in VLSI Test Symposium, 2008. VTS 2008. 26th IEEE, 2008.
, “A clock-less jitter spectral analysis technique”, Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 55, pp. 2263–2272, 2008.
, “A cost analysis framework for multi-core systems with spares”, in Test Conference, 2008. ITC 2008. IEEE International, 2008.
, “Digitally-assisted analog/RF testing for mixed-signal SoCs”, in Asian Test Symposium, 2008. ATS'08. 17th, 2008.
, “Reliability analysis for flexible electronics: Case study of integrated a-Si: H TFT scan driver”, ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 4, no. 3, 2008.