K.-T. Tim Cheng
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] , “Characterization and Applications of Spatial Variation Models for Silicon Microring-Based Optical Transceivers”, in 57th Design Automation Conference (DAC), San Francisco, CA, 2020.
66_5_Wang_finalpaper_03_26_2020_23_54.pdf (3.61 MB)
66_5_Wang_finalpaper_03_26_2020_23_54.pdf (3.61 MB), “Robust Design of Large Area Flexible Electronics via Compressed Sensing”, in 57th Design Automation Conference (Accepted), 2020. DAC_2020 (3).pdf (6.24 MB)
DAC_2020 (3).pdf (6.24 MB), “Bidirectional Tuning of Microring-Based Silicon Photonic Transceivers for Optimal Energy Efficiency”, in 24th Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo, Japan, 2019. ASP-DAC19-Yuyang-camera_ready.pdf (2.94 MB)
ASP-DAC19-Yuyang-camera_ready.pdf (2.94 MB), “Compact Modeling of Thin Film Transistors for Flexible Hybrid IoT Design”, IEEE Design & Test, no. Special Issue: Circuits and Systems for VLSI Internet-of-Things (IoT) Devices, 2019. IEEED&T.pdf (2.79 MB)
IEEED&T.pdf (2.79 MB), “Low-voltage High-performance Flexible Digital and Analog Circuits based on Ultrahigh-purity Semiconducting Carbon Nanotubes”, Nature Communication, 2019. s41467-019-10145-9.pdf (3.65 MB)
s41467-019-10145-9.pdf (3.65 MB), “Process Design Kit and Design Automation for Flexible Hybrid Electronics”, in Design Automation And Test in Europe (Invited Paper), Florence, Italy, 2019. DATE19_Jim_submission.pdf (2.4 MB)
DATE19_Jim_submission.pdf (2.4 MB), “Process Design Kit and Design Automation for Flexible Hybrid Electronics”, in SID International Symposium, 2019. (invited paper), 2019. FHEPDK_Jim_Huang_SID19_for_review_v1.pdf (665.97 KB)
FHEPDK_Jim_Huang_SID19_for_review_v1.pdf (665.97 KB), “Taming Emerging Devices’ Variation and Reliability Challenges with Architectural and System Solutions”, in 32nd IEEE International Conference on Microelectronic Test Structures (Invited Paper), Kita-Kyushu City, Japan, 2019. Invited-3-Cheng.pdf (522.21 KB)
Invited-3-Cheng.pdf (522.21 KB), “Task Mapping-Assisted Laser Power Scaling for Optical Network-on-Chips”, in International Conference On Computer Aided Design (ICCAD), Westminster, CO, 2019. 03C_3_Wang_finalpaper_08_06_2019_17_29.pdf (2.15 MB)
03C_3_Wang_finalpaper_08_06_2019_17_29.pdf (2.15 MB), “Ultra-thin Skin Electronics for High Quality and Continuous Skin-Sensor-Silicon Interfacing”, in 56th Design Automation Conference, 2019. DAC_ACM.pdf (3.68 MB)
DAC_ACM.pdf (3.68 MB), “Compact Modeling of Carbon Nanotube Thin Film Transistors for Flexible Circuit Design”, in Design, Automation and Test in Europe (DATE), Best Paper Award Nominations , Dresden, Germany, 2018. DATE_CNTTFT2018.pdf (2.1 MB)
DATE_CNTTFT2018.pdf (2.1 MB), “Energy-Efficient Channel Alignment of DWDM Silicon Photonic Transceivers”, in Design, Automation and Test in Europe (DATE), Dresden, Germany, 2018. DATE18_YW_camera_ready_v4.pdf (1.45 MB)
DATE18_YW_camera_ready_v4.pdf (1.45 MB), “Fully Printed Organic Pseudo-CMOS Circuits for Sensing Applications”, in 1st IEEE International Flexible Electronics Technology Conference (IFETC), Ottawa, Canada, 2018. 2018IEEE-IFETC-Final.pdf (1.08 MB)
2018IEEE-IFETC-Final.pdf (1.08 MB), “Pairing of Microring-based Silicon Photonic Transceivers for Tuning Power Optimization”, in 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 2018. ASPDAC18_camera_ready_v4.pdf (1.44 MB)
ASPDAC18_camera_ready_v4.pdf (1.44 MB), “Process Design Kit for Flexible Hybrid Electronics”, in in 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), (Invited Paper), 2018. aspdac_pdk_for_FHE2018.pdf (1.38 MB)
aspdac_pdk_for_FHE2018.pdf (1.38 MB), “3D-DPE: A 3D High-Bandwidth Dot-Product Engine for High-Performance Neuromorphic Computing”, Design, Automation and Test in Europe (DATE). Lausanne, Switzerland, 2017.
, “An Artificial Neural Network Approach for Screening Test Escapes”, Asia and South Pacific Design Automation Conference (ASP-DAC). Chiba/Tokyo, Japan, 2017. aspdac17.pdf (810.67 KB)
aspdac17.pdf (810.67 KB), “Compact Modeling and Circuit-Level Simulation of Silicon Nanophotonic Interconnects”, in Design, Automation and Test in Europe (DATE), Lausanne, 2017. DATE17_Rui_camera_ready.pdf (2.36 MB)
DATE17_Rui_camera_ready.pdf (2.36 MB), “Compact Modeling for Silicon Photonic Heterogeneously Integrated Circuits”, Journal of Lightwave Technology (JLT), 2017. Compact Modeling for Silicon Photonic Heterogeneously Integrated Circuits early access.pdf (1.36 MB)
Compact Modeling for Silicon Photonic Heterogeneously Integrated Circuits early access.pdf (1.36 MB), “Detecting Hardware Trojans in Unspecified Functionality Through Solving Satisfiability Problems”, in Asia and South Pacific Design Automation Conference (ASP-DAC), 2017. ASPDAC17_v2.pdf (399.81 KB)
ASPDAC17_v2.pdf (399.81 KB), “DLPS: Dynamic Laser Power Scaling for Optical Network-on-Chip”, in Asia and South Pacific Design Automation Conference (ASP-DAC), Chiba/Tokyo, Japan, 2017. laser_final.pdf (2.21 MB)
laser_final.pdf (2.21 MB), “Mining Mutation Testing Simulation Traces for Security and Testbench Debugging”, in International Conference on Computer-Aided Design (ICCAD), 2017. ICCAD17_v2.pdf (650.84 KB)
ICCAD17_v2.pdf (650.84 KB), “A Multiply-Add Engine with Monolithically Integrated 3D Memristor Crossbar/CMOS Hybrid Circuit”, Nature Scientific Reports, 2017.
, “Robust Design and Design Automation for Flexible Hybrid Electronics”, in International Symposium on Circuits and Systems (ISCAS), 2017.
, “Verification and Trust for Unspecified IP Functionality”, in Hardware IP Security and Trust, Springer, 2017.